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    <title>HW | SKKU IRIS Lab</title>
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      <title>HW</title>
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      <title>Neuromorphic/In-Memory Computing</title>
      <link>https://iris-lab.skku.edu/project/ml_mem/</link>
      <pubDate>Tue, 22 Dec 2020 22:12:44 +0900</pubDate>
      <guid>https://iris-lab.skku.edu/project/ml_mem/</guid>
      <description>&lt;p&gt;Our research focuses on memory-based deep learning techniques, including SRAM/ReRAM-based deep learning processing-in-memory (PIM) and Flash memory based robust deep learning inference techniques.&lt;/p&gt;
</description>
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    <item>
      <title>Sensor Systems with Integrated Deep Learning</title>
      <link>https://iris-lab.skku.edu/project/hw_mlsensor/</link>
      <pubDate>Sun, 22 Dec 2019 22:12:44 +0900</pubDate>
      <guid>https://iris-lab.skku.edu/project/hw_mlsensor/</guid>
      <description>&lt;p&gt;To maximize the performance and efficiency of deep learning based data processing, we are currently exploring sensor platform design optimized for deep learning by leveraging the interactions between a sensor platform and a DNN.&lt;/p&gt;
</description>
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    <item>
      <title>Digital Design Techniques</title>
      <link>https://iris-lab.skku.edu/project/hw_digital/</link>
      <pubDate>Sat, 22 Dec 2018 22:12:44 +0900</pubDate>
      <guid>https://iris-lab.skku.edu/project/hw_digital/</guid>
      <description>&lt;p&gt;Tolerating timing error due to power supply
noise (PSN) in digital circuits can be done with adding voltage
margins. We designed guidelines to avoid overdesign
due to PSN especially for the low-cost IoT devices.
Specifically, we presented an accurate time-domain behavioral
model of timing slack variation due to PSN accounting for the
clock-data compensation.&lt;/p&gt;
</description>
    </item>
    
    <item>
      <title>Low-power Crypto Engines</title>
      <link>https://iris-lab.skku.edu/project/hw_security/</link>
      <pubDate>Sat, 22 Dec 2018 22:12:44 +0900</pubDate>
      <guid>https://iris-lab.skku.edu/project/hw_security/</guid>
      <description>&lt;p&gt;The physical security is a key challenge for the resource-constrained edge platforms.
A key challenge is to enable secure as well as ultra-low-power hardware.
The research seeks to understand the interactions between low-power and security
in edge devices, and explore innovations to enhance security at minimal power cost.
Specifically, the research investigated the interactions between design of
area-/power- efficient crypto engines and their side-channel resistance.
The goal is to enable side-channel secure encryption in resource-constrained platforms such as sensors.&lt;/p&gt;
</description>
    </item>
    
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      <title>Low-Power Image Sensor System</title>
      <link>https://iris-lab.skku.edu/project/hw_sensor/</link>
      <pubDate>Sat, 22 Dec 2018 22:12:44 +0900</pubDate>
      <guid>https://iris-lab.skku.edu/project/hw_sensor/</guid>
      <description>&lt;p&gt;The objective of this work is to design a self-powered, environment-adaptive sensor node that maintains a target Quality-of-Service (QoS) in a time-varying environment. A wireless image sensor node will be designed that incorporates a CMOS imager, digital signal processing unit, and RF transreceiver and is powered using energy harvested from the environment. The circuit innovations for the individual components will be coupled with system design and on-line real-time control principles to approach this highly challenging goal of developing a self-powered image sensor node. The self-powered sensor node and reliable energy-efficient image transmission principles created in this work will allow deployment of image sensors and communication networks to cyber-physical systems in various military as well as civilian applications.&lt;/p&gt;
</description>
    </item>
    
    <item>
      <title>Low-Power Image/Video Processing</title>
      <link>https://iris-lab.skku.edu/project/mm_lowpower/</link>
      <pubDate>Fri, 22 Dec 2017 22:12:44 +0900</pubDate>
      <guid>https://iris-lab.skku.edu/project/mm_lowpower/</guid>
      <description>&lt;p&gt;A critical goal in the image sensor node design is to deliver high-quality visual information under stringent energy and bandwidth constraints. This goal becomes more challenging under dynamic conditions such as environmental noise and variations in a wireless channel condition. We tackle this challenge by designing low-power energy-quality scalable image processing techniques.&lt;/p&gt;
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